Documentation
Memory Address Mapping
The 64K address space are decoded into 8 sections by connecting the top 3 address lines, A15, A14 and A13, to a 3-line to 8-line decoder (74LS138). The outputs selects one of 8 memory ICs by asserting one of the Memory Select lines (MS0..MS7).
| Memory Select |
Device |
Address |
| MS0 |
ROM |
0x0000 – 0x1FFF |
| MS0 |
RAM |
0x0000 – 0x1FFF |
| MS1 |
RAM |
0x2000 – 0x3FFF |
| MS2 |
RAM |
0x4000 – 0x5FFF |
| MS3 |
RAM |
0x6000 – 0x7FFF |
| MS4 |
RAM |
0x8000 – 0x9FFF |
| MS5 |
RAM |
0xA000 – 0xBFFF |
| MS6 |
RAM |
0xC000 – 0xDFFF |
| MS7 |
RAM |
0xE000 – 0xFFFF |
Device Address Mapping
| Device Select |
Device |
I/O Address |
| DS0 |
Bank Switching Device |
0x00 |
| DS0 |
Unused Space |
0x01 – 0x07 |
| DS1, IO_B0 |
Unassigned Device |
0x08 |
| DS1, IO_B1 |
Unassigned Device |
0x09 |
| DS1, IO_B2 |
Unassigned Device |
0x0A |
| DS1, IO_B3 |
Unassigned Device |
0x0B |
| DS1, IO_A0 |
Output Port A |
0x0C |
| DS1, IO_A1 |
Output Port B |
0x0D |
| DS1, IO_A2 |
Input Port A |
0x0E |
| DS1, IO_A3 |
Input Port B |
0x0F |
| DS2 |
Z80DART Data Register |
0x10 |
| DS2 |
Z80DART Control Register |
0x11 |
| DS3 |
IDE Host Interface – Data |
0x18 |
| DS3 |
IDE Host Interface – Error |
0x19 |
| DS3 |
IDE Host Interface – Sector count |
0x1A |
| DS3 |
IDE Host Interface – Sector number |
0x1B |
| DS3 |
IDE Host Interface – Cyliner low |
0x1C |
| DS3 |
IDE Host Interface – Cyliner high |
0x1D |
| DS3 |
IDE Host Interface – Head/Device |
0x1E |
| DS3 |
IDE Host Interface – Status |
0x1F |
| DS3 |
IDE Host Interface – Command |
0x1F |
| DS4 |
IDE Host Interface – High 8-bit |
0x20 |
| DS5 |
CTC – Channel 0 |
0x28 |
| DS5 |
CTC – Channel 1 |
0x29 |
| DS5 |
CTC – Channel 2 |
0x2A |
| DS5 |
CTC – Channel 3 |
0x2B |
| DS5 |
Unused Space |
0x2C – 0x2F |
| DS6 |
Unassigned Device |
0x30 – 0x37 |
| DS7 |
Unassigned Device |
0x38 – 0x3F |
|
Unused Space |
0x40 – 0xFF |
Pinout for Expansion Header
|
Pin |
Pin |
|
| RD |
1 |
2 |
GND |
| WR |
3 |
4 |
DS6 |
| CLK |
5 |
6 |
DS7 |
| A15 |
7 |
8 |
IO_B3 |
| A14 |
9 |
10 |
IO_B2 |
| A13 |
11 |
12 |
IO_B1 |
| A12 |
13 |
14 |
IO_B0 |
| A11 |
15 |
16 |
DATA_DIR |
| A10 |
17 |
18 |
IORQ |
| A9 |
19 |
20 |
M1 |
| A8 |
21 |
22 |
INT |
| A7 |
23 |
24 |
RESET |
| A6 |
25 |
26 |
D7 |
| A5 |
27 |
28 |
D6 |
| A4 |
29 |
30 |
D5 |
| A3 |
31 |
32 |
D4 |
| A2 |
33 |
34 |
D3 |
| A1 |
35 |
36 |
D2 |
| A0 |
37 |
38 |
D1 |
| +5V |
39 |
40 |
D0 |
